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Title |
FPGA-based Implementation of Digital Logic Design using Altera DE2 Board |
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Author |
Zeyad Assi Obaid, Nasri B Sulaiman, Mohd Nizar bin Hamidon |
| Citation |
Vol. 9 No. 8 pp. 186-194 |
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Abstract |
In control applications, most of the physical systems require a real-time operation to interface high speed constraints; higher density programmable logic devices such as field programmable gate array (FPGA) can be used to integrate large amounts of logic in a single IC. This paper presents an Experimental implementation of digital logic designs on the Altera DE2 board which presented as an educational and development board, in order to check the flexible implementation with FPGA and to get the better and safely ways to use these specifications during any design implementations. The implementation in this paper contains of two types of digital logic design, the first one is Digital UP-counter design which designed using Verilog language, the experimental results for this design was displayed on the 7-segment with the sequence of HEX0 and HEX1. The second design is one-input Digital fuzzy logic controller which contain of three parts, Fuzzifier, inference engine and Defuzzifier. The typical Fuzzy logic controller was designed using VHDL language; the memory block of this design was generated using MegaWizard Plug-in Manager which provided by Altera Quartus II program, the design using MegaWizard is important to ensure the good design specifications. To improve this design, groups of membership function with 5 linguistics variable and rule table of 25 rules were used to generate the control surface of the fuzzy logic controller, and to generate the simulation before the implementation. From these results, we got that the maximum error, minimum error, mean error, mean square error and range of values are: 0.5349, -0.5349, 3.89E-17, 0.0196 and -30 to 30, respectively. These results proved that the FPGA-based fuzzy controller is very close to the software-based controller using MATLAB. |
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Keywords |
Fuzzy Logic Controller, Digital up-counter, 7-segments Display, Altera Quartus II, Hardware implementation |
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