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Sequential Circuits In The Framework Of (2n+1)-ary Discrete Logic


D. Venkat Reddy, Ch. D. V. Paradesi Rao, E. G. Rajan


Vol. 8  No. 7  pp. 175-181


This paper is concerned with the formulation of a novel paradigm called (2n+1)-ary logics and their ultimate use in the development of multiple valued logic based processor. Apart from a preliminary introduction to the binary valued logic systems, this paper introduces the notion of Truth values Reliability-Unreliability model and a brief exposition of multiple valued logic in the framework of switching algebra. Finally the paper discusses the simulation results of implementing primarily ternary and penta logic switching functions using traditional binary logic circuits.


Multiple Valued Logic, Switching functions