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Performance Estimation of Karnaugh Map through UML


Vipin Saxena, Manish Shrivastava, Deepak Arora


Vol. 9  No. 6  pp. 220-225


The digital circuits are mostly constructed through digital gates. The minimization of the number of digital gates is an important activity in designing the digital circuits. This minimization reduces the size and cost of these systems and the performance can be improved. There are some well established methods for doing these simplifications. One of the famous methods is known as Karnaugh map (K-map) method. The digital circuits can be represented and analyzed using the boolean functions. K-map is in fact a visual diagram of representing all possible ways a boolean function may be expressed. In the present wok, a well known modeling language, the Unified Modeling Language (UML) is used for designing an Object-oriented model for Karnaugh map with the help of digital gates. An Object-oriented algorithm is also proposed for simplification of boolean functions through K-map. The UML stereotypes and class diagrams are presented and performance of UML model is analyzed through a case study.


Boolean functions, Digital Circuit, Karnaugh map, Minterm, UML Class diagram, Object-oriented Model