To search, Click below search items.


All Published Papers Search Service


Static Performance Analysis of Low Power SRAM


Mamatha Samson


Vol. 10  No. 5  pp. 189-197


Low power SRAMs are essential in embedded systems as they are preferred as on chip memories. This paper examines the read stability, write ability and leakage power of various dual-Vt configurations, of an asymmetric SRAM cell (Pass cell) in an array considering the process-induced intra-die threshold voltage variations using N-curve metrics. The effects of process induced Vt variations in 22 different dual-Vt cell combinations are evaluated and compared using Monte Carlo simulations. The comparisons are made with the help of power noise margins and leakage power. The variances and percentage variances from the mean of margins for all combinations are estimated and compared. Comparisons are also made based on four different yield values of the metrics. Thus given a range of a metric and the yield value one can choose the type of configuration of Pass cell. The results help in process variation tolerant design of Pass cell. In addition to this sub threshold operation of C0 configuration of Pass cell is examined under various conditions.


SRAM, read stability, write ability leakage variation