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Title |
Testing of RF Differential Low Noise Amplifiers using Built-In-Test circuits |
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Author |
J.Kaviyarasan, S.Suvitha |
| Citation |
Vol. 12 No. 4 pp. 132-136 |
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Abstract |
This paper presents an efficient, low-cost, built-in test (BIT) circuit for radio frequency differential low noise amplifiers (DLNAs). The BIT circuit detects amplitude alterations at the outputs of the DLNA, due to parametric or catastrophic faults, and provides a single digital Pass/Fail indication signal. A triple modular redundancy approach has been adopted for the BIT circuit design to avoid possible yield loss in case of a malfunctioning test circuitry. This technique evaluated on typical CMOS RF DLNA and simulation result is presented. |
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Keywords |
Built-in-test (BIT), design for testability, LNA testing, RF testing, triple modular redundancy |
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