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Optimization of Memory for AES Rijndeal algorithm Implementation on Embedded system


M. Ravindra Babu, A. R. Reddy


Vol. 13  No. 9  pp. 105-108


Advanced Encryption Standard (AES) algorithm has gained popularity as it is deployed in various embedded systems. Realization of AES algorithm on 8051 microcontroller with minimum memory will be useful for deploying it in low cost applications. This paper addresses the memory requirement when the AES algorithm is ported into microcontroller using standard embedded system design tools. Theoretical memory requirement is calculated and is compared with measured values. Algorithm is compiled using KEIL and SDCC compilers targeting into an 8051 microcontroller board. The results are presented for key lengths of 128 bits and 256 bits. The measured results shows higher memory requirement than the theoretical values during the implementation. Also, SDCC yields lowest possible RAM for AES algorithm. These observations further confirmed by porting the compiled program into an embedded board realized with P89V51RD2 controller.


Memory Optimization, AES, Embedded System